| dc.date.accessioned | 2023-06-14T08:04:24Z | |
| dc.date.available | 2023-06-14T08:04:24Z | |
| dc.date.issued | 2017 | |
| dc.identifier | doi:10.19211/KUP9783737603772 | |
| dc.identifier.isbn | 978-3-7376-0377-2 (e-book) | |
| dc.identifier.uri | urn:nbn:de:0002-403772 | |
| dc.identifier.uri | http://hdl.handle.net/123456789/14817 | |
| dc.description | Zugleich: Dissertation, Universität Kassel, 2017 | |
| dc.language.iso | eng | |
| dc.publisher | kassel university press | |
| dc.rights | Urheberrechtlich geschützt | |
| dc.rights.uri | https://rightsstatements.org/page/InC/1.0/ | |
| dc.subject.ddc | 004 | |
| dc.subject.ddc | 620 | |
| dc.title | Run-time Reconfigurable Constant Multiplication on Field Programmable Gate Arrays | eng |
| dc.type | Buch | |
| dcterms.abstract | This book addresses the question how run-time reconfigurable constant multipliers (RCMs) can be efficiently implemented on field programmable gate arrays (FPGAs). RCMs calculate the multiplication of an input number by one out of several constants which can be selected during run-time. This is important as constant multiplication is an essential operation in digital signalprocessing (DSP) applications. The evaluation of RCMs is done by considering reconfiguration using reconfigurable look-up tables (LUTs),reconfiguration using multiplexers (MUXs) and Partial Reconfiguration (PR). This book contributes two new methods to generate RCMs using the first two reconfiguration principles. First, a LUT-based constant multiplier is extended to be reconfigurable. Second, optimized constant multipliers without reconfiguration are fused using MUXs. Moreover, a general post-optimization for MUX-based RCMs is proposed. Finally, the design space produced in this way is analyzed using synthesis experiments. The contributed methods provide important trade-off points in the design space of RCMs on FPGAs. | eng |
| dcterms.accessRights | open access | |
| dcterms.creator | Möller, Konrad | |
| dcterms.dateAccepted | 2017-08-11 | |
| dcterms.extent | xx, 116 Seiten | |
| dc.contributor.corporatename | Kassel, Universität Kassel, Fachbereich Elektrotechnik / Informatik | |
| dc.contributor.referee | Zipf, Peter (Prof. Dr.-Ing.) | |
| dc.contributor.referee | Meyer-Baese, Uwe (Prof. Dr.-Ing.) | |
| dc.publisher.place | Kassel | |
| dc.relation.isbn | 978-3-7376-0376-8 (print) | |
| dc.subject.swd | Field programmable gate array | eng |
| dc.subject.swd | Multiplizierer | ger |
| dc.subject.swd | Konstante | ger |
| dc.subject.swd | Rekonfiguration | ger |
| dc.subject.swd | Laufzeit | ger |
| dc.subject.swd | Implementierung <Informatik> | ger |
| dc.subject.swd | Digitale Signalverarbeitung | ger |
| dc.type.version | publishedVersion | |
| kup.iskup | true | |
| kup.subject | Naturwissenschaft, Technik, Informatik, Medizin | |
| kup.typ | Dissertation | |
| kup.institution | FB 16 Elektrotechnik / Informatik | |
| ubks.nodoigen | true | |
| kup.binding | Softcover | |
| kup.size | DIN A5 | |
| ubks.epflicht | true | |
